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Reduction of false alarms in PCB inspection (2)

建立日期：2018/02/21
  • 作者： Orbotech
  • 出處： USPTO-美國專利商標局
  • 內容： 本篇內容為Orbotech於July 19, 2007 公開之美國專利（尚未獲證），下文為專利摘要，專利全文請連結參考網址，瀏覽專利全文所需看圖軟體請至 http://www.alternatiff.com/ 下載。

    Orbotech在此主題上有2篇專利，將一一介紹。

    A method for automatically optically inspecting an electrical circuit, comprising: acquiring at least one optical image of an electrical circuit; generating at least one first inspection image from the at least one image and determining regions of candidate defects therefrom; generating at least one additional inspection image for regions surrounding candidate defects, said at least one additional inspection image at least partially including optical information not included in the at least one first inspection image; and determining whether the candidate defect is a specious defect by inspecting the at least one additional inspection image.
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