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半導體先進封裝檢測應用趨勢

建立日期：2020/11/17
  • 作者： 台積電先進封裝量測中心/徐豐源經理
  • 出處： 2020 AOI論壇與展覽
  • 內容： 本篇為「2020 AOI論壇與展覽」演講簡報，內容簡介如下：

    Advanced packaging techniques are developing rapidly and many different processes are used in different applications. In general, all seek to integrate more power and functionality in a single package that uses less space and has more numerous, shorter, faster connection paths. Most use some form of vertical integration, stacking chips on top of each other or on specially designed substrates. Vertical connections are frequently made using bumps or pillars that extend above the surface of the chip. Because these processes use known good die, the cost of failure is high. The cost of failure can be even greater when the health and safety of the user is at risk, as in automotive applications for assisted driving or self-driving cars. Fast accurate inspection and measurement of these and other similar structures is a critical requirement for improving yields and ensuring reliability.
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