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Using Design Based Binning to Improve Defect Excursion Control...

建立日期：2018/02/21
  • 作者： Crockett Huang,...
  • 出處： United Microelectronic Corp.,Tainan,Tainan
  • 內容： For advanced device (45 nm and below), we proposed a novel method to monitor systematic and random excursion. By integrating design information and defect inspection results into automated software (DBB), we can identify design/process marginality sites with defect inspection tool. In this study, we applied supervised binning function (DBC) and defect criticality index (DCI) to identify systematic and random excursion problems on 45 nm SRAM wafers. With established SPC charts, we will be able to detect future excursion problem in manufacturing line early.

    期刊發表:
    [1] K. Monahan and B. Trafas, “Design and Process Limited Yield at the 65nm Node and Beyond” SPIE, 2005.
    [2] J. Yeh, A. Park, “Novel technique to separate systematic and random defect during 65-nm and 45-nm process R&D stage,” Proceedings, SPIE 6521-40, 2007.

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